Many people have contributed to this project.

The research on mixed signal simulation started with SEAMS version 1.0
(Simulation Environment for VHDL-AMS) in the Distributed Processing
Laboratory(DPL) at the University of Cincinnati under the direction of
Dr. Harold Carter.  The research involved the work of many students in the
Distributed Processing Laboratory.  What follows is a listing of the
researchers involved.  Hopefully we have included everybody, if not, please
notify us.  Thank you.

The following persons have worked on the design and implementation of the 
mixed signal simulator, SEAMS version 1.0. 

  Wan-Fu Chen
  Victoria Chernyakhovsky
  Chandrashekar Lakshminarayanan Chetput
  Peter Frey
  VishwaShanth Kasula
  Tom Kazmierski
  Venkateswaran Krishna
  Joseph Manavalan
  Kathiresan Nellayappan
  Vasudevan Shanmugasundaram

The SEAMS project was followed by the SIERRA project and further
improvements were made in the code.  The principle contributors to the
SIERRA project were:

  Shishir Agarwal
  Geeta Balakrishnan
  Sachin Bapat
  Vikram Krishnamachary
  Parthasarathy Narasimhan
  Sanjeev Pandey
  Raghuram Srinivasan

SIERRA2 is the latest effort in the research to develop a faster mixed 
signal VHDL-AMS simulator.  The simulator is based on the basic design developed in  
the earlier version, but is enhanced to handle general equations.
The principle contributors to the SIERRA2 project are:

  Vinod Chamarty
  Prashanth Cherukuri
  Sivakumar Gowrisankar
  Sameer Kher
  Shriram Subramanian
  Harish Venkataramani
